The present invention relates generally to systems and methods for program code development. More particularly, the invention relates to a hardware performance monitoring mechanism for the evaluation of a program module.
Performance monitoring systems are often used to monitor the performance of the algorithms used in a program module and the supporting hardware. Performance monitoring techniques can be classified into three main categories: (1) hardware-based performance monitoring techniques; (2) software-based performance monitoring techniques; and (3) a hybrid technique utilizing a combination of software and hardware approaches.
Software-based performance monitoring techniques include software probes that write out information detailing the behavior of the program while the program is executing. A disadvantage to software performance monitoring is that it is intrusive to the program, often requiring substantial processor cycles and additional memory usage. Furthermore, the software probes cannot obtain detailed architectural performance measurements such as cache misses and the like.
The hybrid performance monitoring approach utilizes both hardware and software based techniques. In one such hybrid scheme, a probe data collection integrated circuit (chip) interfaces with a bus that is in communication with a number of processors. Program code running in each of the processors includes software probes that write event data to the probe data collection chip. The event data represents interprocess communications or events. The probe data collection chip affixes a time stamp to the data and stores the data for further analysis. A disadvantage with this technique is that it cannot obtain detailed architectural performance measurements.
Hardware performance monitoring techniques typically include probing physical signals with dedicated instrumentation and recording the results on external hardware. This approach is non-intrusive to the program code and can obtain detailed architectural performance measurements. However, there is no way of associating a hardware signal with a corresponding source code statement. This association is useful for making improvements to the program code.
Accordingly, there exists a need for a performance monitoring system that can overcome these shortcomings.
The technology of the present invention pertains to an apparatus and method for implementing a hardware performance monitoring mechanism for use in analyzing the behavior of a program module. The apparatus includes probe logic hardware that monitors the program""s behavior in executing memory reference instructions. The probe logic hardware generates several probe signals which are transmitted to a performance monitor circuit when certain events occur. In an embodiment of the present invention, these events can be TLB or cache misses. The performance monitor circuit affixes a time stamp to the probe data and stores the time-stamped probe data in a temporary memory device until the data is stored in a secondary storage device.
A user can then analyze the probe data to determine a suitable manner for optimizing the program in order to improve its performance. The user will be able to associate a particular set of probe data with a particular program statement through the program counter. This will enable the user to optimize the program based on the architectural performance measurements.